DDR DATASHEET 中 AC150和AC175什么意思
在ddr的datasheet上面某些参数有AC150和AC175的区别。请问这里AC175和AC150啥意思，是啥标准 好像是ODT的选择吧。等高手来解决 能不能贴出来？我在DDR规范上没有找到这两个参数 应该是建立时间部分的AC电平。即判决门限为Vref+/-AC*； Table 68 — ADD/CMD Setup and Hold Base-Values for 1V/ns
NOTE 1.(ac/dc referenced for 1V/ns Address/Command slew rate and 2 V/ns differential CK-CK# slew rate)
NOTE 2.The tIS(base) AC150 specifications are adjusted from the tIS(base) AC175 specification by adding an
additional 125 ps for DDR3-800/1066 or 100ps for DDR3-1333/1600 of derating to accommodate for
the lower alternate threshold of 150 mV and another 25 ps to account for the earlier reference point
[(175 mv - 150 mV) / 1 V/ns].
上面是JDEC79-3D p182 對於ac150的規範，令人不解的是 未什麼在3C版已經定義了ac175的規範，
再3D版的時候又多了一個AC150的規範....
而到底要再哪個時候使用哪一個規範(AC150 OR AC175)也是難以了解@@??
附上官方載點: [url=http://www.jedec.org/standards-documents/docs/jesd-79-3d]http://www.jedec.org/standards-documents/docs/jesd-79-3d[/url]
要註冊才能下載 [quote]Table 68 — ADD/CMD Setup and Hold Base-Values for 1V/ns
NOTE 1.(ac/dc referenced for 1V/ns Address/Command slew rate and 2 V/ns differential CK-CK# slew rate)
NOTE 2.The tIS(base) AC150 specificatio ...
[size=2][color=#999999]a9540131225 发表于 2010-4-27 21:22[/color] [url=http://www.pcbsi.com/redirect.php?goto=findpost&pid=5964&ptid=658][img]http://www.pcbsi.com/images/common/back.gif[/img][/url][/size][/quote]
很感谢a9540131225贴出了原文。这个也是涉及到derating的问题。如果你按照1V/ns的边沿速率来计算AC150和AC175的差别，你就可以发现，其实两者是完全等价的。即（0.175-0.150）=0.125V按照上升边沿为1V/ns的速率来计算，需要125ps。在本论坛中有关于DDR2 derating原理的介绍，个人认为是一样的道理。需要结合具体的验证方式来确定你选择哪一种参考电平。 文檔中寫著在ac175的規範上+100ps(1333/1600) + 25ps [(175 mv - 150 mV) / 1 V/ns]
照ripple所說..兩者完全等價(AC150 & AC175)，那兩者應用上是否用哪一個規範都可行
一般上應該都是有各自套用的地方才會多規定一個AC150，否則2者一樣豈不是矛盾了:dizzy:
翻了好久都沒看到AC175 和 AC150 的應用時機...暈. Jedec在刚开始定义Threshold时，DDR3-800/1066Mbps是AC175，后来在定义DDR3-1333/1600时AC阈值定为AC150。为了统一AC150和AC175，后来改版时给DDR3-800/1066也增加了AC150的Threshold。
两者在本质上是一样的，因为tIS在AC150时比AC175做了更多的预留，正如你上面提到的公式。
ADD/CMD信号是多负载的，在负载很多时信号会达不到AC175，在这种情况下可以应用AC150，但在tIS上需要更多的补偿。 [i=s] 本帖最后由 a9540131225 于 2010-4-28 11:27 编辑 [/i]
[quote]Jedec在刚开始定义Threshold时，DDR3-800/1066Mbps是AC175，后来在定义DDR3-1333/1600时AC阈值定为AC150。为了统一AC150和AC175，后来改版时给DDR3-800/1066也增加了AC150的Threshold。
两者在本质上是一样的，因为t ...
[size=2][color=#999999]Triton 发表于 2010-4-28 10:48[/color] [url=http://www.pcbsi.com/redirect.php?goto=findpost&pid=5977&ptid=658][img]http://www.pcbsi.com/images/common/back.gif[/img][/url][/size][/quote]
so..在使用上的話，也就沒規範出使用ac150 or ac175 的限制囉?
也就是說套用AC150 OR AC175 都OK(本質上等價，視情況及負載狀況)?
感覺上這樣規定就有點不明確了:( 确实是这样，本质上，最后得到的时序裕量是一样的。 附上 intel SI在論壇上的回覆
intel 說在AC175上有Issues 所以增加了AC150這個SPEC.
不知各位大大還有沒有其他見解?
The tDS/tDH specs for 800/1067 were originally set at AC175, while for
1333/1600 they were set at AC150. It was a year later that someone decided it
would be nice to just use the same AC threshold for all 4 speed bins. So the
AC150 threshold for 800/1067 was added to spec later. By this time the AC175
spec had already been published, so rather than remove it, which may have
created issues for people already using AC175, they just added the specs for
AC150, which included the penalty. This is why both appear in the spec. I
know it's a subtle distinction, but its not the same as with tIS, where the
alternate thresholds were designed in from the start.
You are right in that in the case of tDS at 800/1067, you are generally better
off using the AC175 spec. It will produce better margins, assuming your eye has
no issue making the AC175 level. But the AC150 is needed at 1333/1600, since
the eye is tighter, and if you want to have a single consistent AC threshold
across all speed bins, then AC150 is the only option. That's why the AC150
specs were added for 800/1067, and why the AC175 specs were left in place.
By the way, the rational for the 25ps penalty has to do with maintaining a
certain area under the curve for charge accumulation above Vref. If you look at
a typical waveform, once it crosses Vref, allowing for DC offsets and such, you
can think of it as beginning to accumulate charge at the reciever input. By the
time you reach AC175, you have typically had sufficient time to accumulate
enough charge to switch the output. When they lowered the threshold to AC150,
they had to add a small amount to the setup time in order to make sure an
equivalent amount of charge had accumulated. The AC threshold is not a real
threshold, its just a proxy for charge accumulation. This is where the 25 ps
penalty came from. I don't design SDRAMs for a living so I can't convey the
circuit theory in detail, but this is my understanding of the specification. 我不知道规范制定的内幕，不过看DDR3的几个版本，确实是这样的 [quote]文檔中寫著在ac175的規範上+100ps(1333/1600) + 25ps [(175 mv - 150 mV) / 1 V/ns]
照ripple所說..兩者完全等價(AC150 & AC175)，那兩者應用上是否用哪一個規範都可行
一般上應該都是有各自套用的地方才會多規定 ...
[size=2][color=#999999]a9540131225 发表于 2010-4-28 09:55[/color] [url=http://www.pcbsi.com/redirect.php?goto=findpost&pid=5975&ptid=658][img]http://www.pcbsi.com/images/common/back.gif[/img][/url][/size][/quote]
我的本意是说，从时序部分来讲，对于建立时间的测试是等价的（主要是其定义了上升波形的边沿速率，从Vref到（Vref+AC175/AC150）这段时间决定了比较器过Vref电平后的充电电荷，就像我在前面回复的，这个观点在论坛中以前讨论DDR2时就有提到。）。从信号质量来说，选择AC175来定义建立时间，会更严格一些。因为明确定义了波形必须要过（Vref+175mV）这个点。如果采用AC150来测，则信号波形不一定需要过（Vref+175mv）这个点，只要超过（Vref+150mv）即可。 [quote]
我的本意是说，从时序部分来讲，对于建立时间的测试是等价的（主要是其定义了上升波形的边沿速率，从Vref到（Vref+AC175/AC150）这段时间决定了比较器过Vref电平后的充电电荷，就像我在前面回复的，这个观点在论坛 ...
[size=2][color=#999999]ripple 发表于 2010-4-28 16:22[/color] [url=http://www.pcbsi.com/redirect.php?goto=findpost&pid=5982&ptid=658][img]http://www.pcbsi.com/images/common/back.gif[/img][/url][/size][/quote]
贊成ripple的觀點...JEDEC在規範上不夠明確....不應該同時存在2個SPEC
容易造成 設計&測試上套用SPEC的爭議 这个问题我也纠结了好久，为什么搞两种。从上面那段intel的文章理解，DDR3-800/1066使用AC175，DDR3-1333/1600可以使用AC150，当然AC175能满足就更好。不过ripple说的对于建立时间的测试是等价的，这句话怎么理解？
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